Degree Type

Dissertation

Date of Award

2016

Degree Name

Doctor of Philosophy

Department

Electrical and Computer Engineering

Major

Electrical Engineering

First Advisor

Degang Chen

Abstract

Analog-to-digital converters (ADCs) are becoming increasingly common in many systems in integrated circuits. Spectral testing is widely used to test the dynamic linearity performance of ADCs and waveform generators. With improvements in the performance of ADCs, it is becoming an expensive and challenging task to perform spectral testing using standard methods because of the requirement that the test instrumentation environment must satisfy several stringent conditions. In order to address these challenges and to decrease the test cost, in this dissertation, four new algorithms are proposed to perform accurate spectral testing of ADCs by relaxing three conditions required for standard spectral testing methods.

The first method developed is relaxing the requirements on precise control of coherent sampling and input signal amplitude. The efficiency and accuracy of this method is similar to the straightforward FFT, but it can simultaneously handle amplitude clipping and noncoherent sampling. By replacing a noncoherent and clipped fundamental with a coherent and unclipped one, correct spectral specifications can be obtained. Both simulation and measurement results validated the proposed method.

The second algorithm can simultaneously perform the linearity test and the spectral test with only one-time data acquisition. Targeted for realizing the cotest of linearity and spectral performance under noncoherent sampling and amplitude clipping, a new accurate method for identifying the noncoherent and clipped fundamental is introduced. The residue after removing the identified fundamental from raw data is used to obtain the linearity and spectral characterizations. Simulation and measurement results against the standard test methods collaborate to validate the accuracy and robustness of the new solution.

The third method proposes an efficient and accurate jitter estimation method based on one frequency measurement. Applying a simple mathematical processing to the ADC output in time domain, the RMS of jitter and noise power are obtained. Furthermore, prior information of harmonics need not be known before the processing. The algorithm is robust enough that nonharmonic spurs do not affect the estimation result. Using the proposed algorithm, specifications of the ADC under test can be obtained without the jitter effect. Simulation results of ADCs with different resolutions show the functionality and accuracy of the method.

The last method is developed to accurately estimate the SNR with sampling clock jitter. This method does not require a precise sampling clock and thus reduces the test cost. The ADC output sequence is separated into two segments. By analyzing the difference of the two segments, the RMS of jitter and the noise power are estimated, and then the SNR is obtained. Simulation and measurement results against the standard test methods collaborate to validate the accuracy and robustness of the new solution.

Copyright Owner

Li Xu

Language

en

File Format

application/pdf

File Size

109 pages

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