Campus Units

Electrical and Computer Engineering

Document Type

Conference Proceeding

Conference

2018 IEEE International Symposium on Circuits and Systems (ISCAS)

Publication Version

Accepted Manuscript

Link to Published Version

https://doi.org/10.1109/ISCAS.2018.8351568

Publication Date

2018

Journal or Book Title

2018 IEEE International Symposium on Circuits and Systems (ISCAS)

DOI

10.1109/ISCAS.2018.8351568

Conference Title

2018 IEEE International Symposium on Circuits and Systems (ISCAS)

Conference Date

May 27-30, 2018

City

Florence, Italy

Abstract

The optimum bias point for an inverse class-F power amplifier is discussed in this paper from a time-domain point of view. It is shown that the inverse class-F power amplifier should be biased in shallow triode region where the bias current is slightly higher than DC current when driven into compression. Lower bias currents can cause significant efficiency degradation due to peaking in the drain-source voltage. Simulation results show that drain efficiency at 6dB over drive drops from 83.4% to 65.2% when bias current is reduced by 34% from optimum bias current. Moreover, it is shown that if the bias current is too high, then the efficiency under power back off is reduced.

Comments

This is a manuscript of a proceeding published as Li, Yifei, and Nathan M. Neihart. "Time-Domain Analysis of Optimum Bias Point in Inverse Class-F Power Amplifiers." In 2018 IEEE International Symposium on Circuits and Systems (ISCAS), (2018): 10.1109/ISCAS.2018.8351568. Posted with permission.

Rights

© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

Copyright Owner

IEEE

Language

en

File Format

application/pdf

Published Version

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