Degree Type

Dissertation

Date of Award

2014

Degree Name

Doctor of Philosophy

Department

Electrical and Computer Engineering

First Advisor

Randall Geiger

Abstract

ABSTRACT

On-chip thermal monitoring is becoming increasingly important as VLSI circuits becoming more complex. On-chip thermal monitors provide critical input to the power and thermal management structures that are necessary to prevent excessive chip temperatures from destroying the device or reducing the expected lifetime to unacceptable levels. In applications where on-chip heating is of concern, multiple built-in temperature sensors are distributed throughout the chip to monitor temperature at critical positions on the die. These on-chip temperature sensors must be compatible with submicron processes, must not consume a large area, and must be highly accurate with low power consumption over standard process variations and over typical supply voltage variations.

One contribution of this work is the introduction of a threshold-voltage-based temperature sensor. It is based upon a self-stabilized feedback architecture. This circuit expresses temperature information as an output voltage. An analysis of this circuit using a standard square-law model for the transistors with zero output conductance shows this structure is power supply independent with an output voltage that is linearly dependent upon the threshold voltage. A more detailed analysis of both the VDD rejection and the output voltage linearity that includes the effect of the transistors output transconductance in the square-law model is also presented. Although the performance is still quite good, strategies to improve both linearity and VDD sensitivity are presented. Two implementations of this temperature sensor were fabricated, one in a TSMC 0.18µm process and the other in an ONC 0.18 µm process. Both simulation results and experimental results of the two circuits show similar performance. The circuit in the TSMC 0.18 µm process consumes only 0.92μW of power with a 1% duty cycle and requires an extremely small area of 15μmÃ?24μm. Nine chips from two process runs with batch slope/curvature correction show a maximum INL error of 0.05C over the temperature range [60C, 90C]. This accuracy is well beyond what is needed for power/thermal management circuitry to achieve target reliability goals in multi-core systems.

Another contribution of this work is the introduction of a new temperature to digital converter (TmDC) that does not require a reference generator, an interface circuit, or an ADC. This TmDC has low supply sensitivity, small die area, and low power consumption. A prototype circuit designed to support power management applications over the [60C, 90C] temperature range was implemented in a 0.13um CMOS process with a 1.2V power supply. It can be used as either a temperature trigger or a digital thermometer. The total silicon area for the TmDC is only .0025mm2. Measurement results show the maximum INL temperature error over the specified operating range with batch calibration is less than 0.1C.

DOI

https://doi.org/10.31274/etd-180810-2214

Copyright Owner

Chen Zhao

Language

en

File Format

application/pdf

File Size

147 pages

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