Location

La Jolla, CA

Start Date

1-1-1987 12:00 AM

Description

Reactive ion etching (RIE) and plasma etching (PE) are vital processes for the attainment of densely-packed, micron-scaled structures for VLSI integrated circuits. However, it is widely recognized that undesirable modifications of semiconductor or insulator materials may accompany the use of these dry etch processes. For example, during the RIE process, samples are exposed to high energy ions, UV photons and x-rays, all of which can result in radiation damage [1] in the form of non-annealable structural defects in gate oxide or Si/Si02 interface regions, deep level traps or surface states. In terms of IC device performance, these effects cause transistor threshold voltage shifts, poor subthreshold performance, increased junction leakage or decreased capacitor charge retention time, degradation of minority carrier lifetime, barrier shifts in Schottky diodes and reduction of the integrity of trench isolation structures [2,3]. Contamination from sputtering of the chamber parts or of the oxide mask may add to these problems. In addition, polymer material that may be deposited from carbon-containing gases has been found to create oxygen-induced stacking faults [4]. All of the above can lead to significant yield reduction.

Book Title

Review of Progress in Quantitative Nondestructive Evaluation

Volume

6A

Chapter

Chapter 1: General Techniques—Fundamentals

Section

Thermal Waves

Pages

245-251

DOI

10.1007/978-1-4613-1893-4_28

Language

en

File Format

application/pdf

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Jan 1st, 12:00 AM

Modulated Reflectance Measurement of Reactive-Ion and Plasma Etch Damage in Silicon Wafers

La Jolla, CA

Reactive ion etching (RIE) and plasma etching (PE) are vital processes for the attainment of densely-packed, micron-scaled structures for VLSI integrated circuits. However, it is widely recognized that undesirable modifications of semiconductor or insulator materials may accompany the use of these dry etch processes. For example, during the RIE process, samples are exposed to high energy ions, UV photons and x-rays, all of which can result in radiation damage [1] in the form of non-annealable structural defects in gate oxide or Si/Si02 interface regions, deep level traps or surface states. In terms of IC device performance, these effects cause transistor threshold voltage shifts, poor subthreshold performance, increased junction leakage or decreased capacitor charge retention time, degradation of minority carrier lifetime, barrier shifts in Schottky diodes and reduction of the integrity of trench isolation structures [2,3]. Contamination from sputtering of the chamber parts or of the oxide mask may add to these problems. In addition, polymer material that may be deposited from carbon-containing gases has been found to create oxygen-induced stacking faults [4]. All of the above can lead to significant yield reduction.