With the dramatic increase in the number of transistors on a chip and the increasing needs for battery-powered applications, low-voltage circuit design techniques have been widely studied in recent year. However, these low supply voltage research efforts have been focused mainly on digital circuits, especially on high density memory circuits. Reported success in achieved high performance low voltage operation in analog circuits lags far behind. Recent results have been presented on CMOS low-voltage operational amplifiers, where the supply voltage has been reduced to less than 2.5V in which the complementary input stages were used to keep the gm constant [SI95] [HL85]. Recently, the floating gate MOS transistor has attracted considerable interest as a nonvolatile analog storage device and as a precision analog trim element because it has threshold voltage programming ability [YU93] [RC95].;The particular focus of this work is on implementing very low voltage analog and mixed-signal integrated circuit in a standard CMOS process. As a proof-of-concept vehicle, this work concentrates on the design of very low voltage operational amplifiers in standard CMOS processes. By connecting a DC reference voltage source in series with the gate of all MOS transistors, the equivalent threshold voltage of all transistors can be electrically lowered. This technique makes it possible to decrease the power supply voltage. The DC reference voltage sources are realized by using a switched capacitor charged periodically and switched between the actual circuit and a reference precharge circuit. By extracting the reference voltage source directly from the threshold voltage itself, the threshold voltage variations due to the process and temperature variations can be compensated, since large threshold variations are intolerable for very low threshold voltage applications.;In a proof-of-concept two-stage operational amplifier designed to operate with a single 5OOmV power supply in a standard 2[Mu] process, the tail current is kept the same as in a 3.3V design, thus the key performance parameters are expected to be maintained at reasonable values. The dramatic decrease of the power supply possible with this approach is paralleled with a corresponding reduction in the power dissipation. Simulation results of this 5OOmV operational amplifier show a 7OdB DC gain, 7.8MHz unity gain bandwidth and a 650 phase margin. Power dissipation is reduced by more than 90% from that of the corresponding 3.3V design. Although the specific implementation is focused on the implementation of an operational amplifier with comparable performance parameters to those with larger supply voltage, the dominant applications of this technique are for designing a variety of analog and mixed-signal systems that operate at very low voltages and with low power dissipation.